| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method, a program, and an apparatus for designing semiconductor devices capable of miniaturizing a chip layout while satisfying constraint of IR drop. <P>SOLUTION: The method for designing semiconductor devices according to one embodiment of the present invention disposes plurality of power supply pads and signal pads around a chip core on a semiconductor chip. A chip size S<SB POS="POST">p</SB>determined by the number of the power supply pads and the signal pads is compared with a chip size S<SB POS="POST">c</SB>determined by the dimension of the chip core. Subsequently, when S<SB POS="POST">p</SB>≥S<SB POS="POST">c</SB>, as long as the IR drop satisfies a constraint value, one or more power supply pads in the disposed power supply pads are eliminated. <P>COPYRIGHT: (C)2013,JPO&INPIT |
