发明名称 FAIL-SAFE MICROCOMPUTER
摘要 <P>PROBLEM TO BE SOLVED: To suppress an operation from being erroneously stopped due to disturbance such as noise to increase an operation rate of control object equipment in a fail-safe microcomputer including two systems of processors which perform the same processing in synchronization. <P>SOLUTION: Collation data on a self-system is output to another system (S101); collation data on the another system is input (S102); and the collation data on the self-system is collated with the collation data on the another system (S103). Next, a collation result of the self-system is output to the another system (S104); a collation result of the another system is input (S105); and normality or abnormality of combination of the collation results is determined (S106). When the combination is normal, the collation result of the self-system is output as it is (S107); however, when the combination is abnormal, a value of an error counter is incremented (S109), and the value of the error counter is compared with a threshold (S110). Then, until the value of the error counter exceeds the threshold, collation operations in S101-S106 are executed again, and when the value of the error counter exceeds the threshold, abnormality processing is executed (S111). <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013089005(A) 申请公布日期 2013.05.13
申请号 JP20110228634 申请日期 2011.10.18
申请人 NIPPON SIGNAL CO LTD:THE 发明人 OKAMOTO SHOZO
分类号 G06F11/18 主分类号 G06F11/18
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