发明名称 SAMPLE AND HOLD CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To shorten a starting time of a high-pass filter circuit by enabling quick charge of the high-pass filter circuit. <P>SOLUTION: The sample and hold circuit comprises: a signal holding circuit 11 for holding an input signal for each predetermined timing; a high-pass filter circuit 12 for removing a low frequency component from a signal appearing on a first node N1 in an output side of a first transistor Q1 connected to the output side of the signal holding circuit 11; a quick charge circuit 14 for quickly charging a capacitor C2 of the high-pass filter circuit 12 by operating only when starting; an amplifying circuit 13 connected to the output side of the high-pass filter circuit 12; and a bias control circuit 15 for keeping a bias potential of the first node N1 at substantial constant before and after shifting to a normal operation from the end of the quick charging operation by the quick charge circuit 14. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013089273(A) 申请公布日期 2013.05.13
申请号 JP20110229627 申请日期 2011.10.19
申请人 NEW JAPAN RADIO CO LTD 发明人 SUGIYAMA TAKAHIRO;HIRAGA KIMIHISA
分类号 G11C27/00;G11C27/02;H03K17/00 主分类号 G11C27/00
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