发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 A second cell (CL2) is adjacent in the cell width direction to a first cell (CL1) which has N times the cell height of a reference cell height (where N is an integer greater than one). A diffusion wiring (102) made from a doping diffusion region is formed below a power supply metal wiring (101) of the second cell (CL2). The first cell (CL1) comprises a transistor diffusion region (D_MP23) which is formed facing the diffusion wiring (102) so as to bridge a lengthened region in the cell width direction of the metal wiring (101). The diffusion wiring (102) is positioned separate from the cell interface (BL1) in the cell width direction.
申请公布号 WO2013065080(A1) 申请公布日期 2013.05.10
申请号 WO2011JP06090 申请日期 2011.10.31
申请人 PANASONIC CORPORATION;HAYASHI, KOHTARO;NISHIMURA, HIDETOSHI 发明人 HAYASHI, KOHTARO;NISHIMURA, HIDETOSHI
分类号 H01L21/82 主分类号 H01L21/82
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