TERNARY CMOS NOT LOGIC ELEMENT

摘要

FIELD: radio engineering, communication.SUBSTANCE: method is realised by using a novel electric circuit which employs additional capacitors based on functionally integrated MOS structures formed by drain regions of MOS transistors and additional gate regions. Such a circuit provides three levels of the logic signal and implement ternary logic while keeping the same topological dimensions as in binary logic.EFFECT: high information capacity of the logic inverter.2 cl, 4 dwg