| 摘要 |
PURPOSE: A power switch acceleration scheme for high speed wakeup is provided to prevent inflow of excessive current into a power gated type circuit block by sequential operation of power switches. CONSTITUTION: An integrated circuit(10) includes a plurality of power gated circuit blocks such as blocks(14A-14C). A plurality of power switches is coupled between a global voltage node of the power gated circuit blocks and a virtual voltage node. A plurality of the power switches is sequentially operated in response to reception of an enable signal. A plurality of the power switches is operated in a first rate in the initial stage and are operated in a second rate according to increase of voltage of the virtual voltage node. [Reference numerals] (10) Integrated circuit; (14A,14B,14C) Power gated block; (16) Non-gated block; (18) Power manager; (AA,BB,CC) Block enable/BE_Clk |
