发明名称 |
Power consumption in LDPC decoder for low-power applications |
摘要 |
This disclosure relates generally to low power data decoding, and more particularly to low power iterative decoders for data encoded with a low-density parity check (LDPC) encoder. Systems and methods are disclosed in which a low-power syndrome check may be performed in the first iteration or part of the first iteration during the process of decoding a LDPC code in an LDPC decoder. Systems and methods are also disclosed in which a control over the precision of messages sent or received and/or a change in the scaling of these messages may be implemented in the LDPC decoder. The low-power techniques described herein may reduce power consumption without a substantial decrease in performance of the applications that make use of LDPC codes or the devices that make use of low-power LDPC decoders.
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申请公布号 |
US8438461(B2) |
申请公布日期 |
2013.05.07 |
申请号 |
US20100892183 |
申请日期 |
2010.09.28 |
申请人 |
VARNICA NEDELJKO;BURD GREGORY;MARVELL WORLD TRADE LTD. |
发明人 |
VARNICA NEDELJKO;BURD GREGORY |
分类号 |
H03M13/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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