发明名称 System and method for optimizing interconnections of components in a multichip memory module
摘要 An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have approximately the same propagation time regardless of which device is involved. Specifically, the devices are arranged around the hub in pairs, with each pair of devices being oriented such that a functional group of signals for each device in the pair, such as the data bus signals, are positioned adjacent each other on a circuit board of the module. This allows for a data and control-address busses having approximately the same electrical characteristics to be routed between the hub and each of the devices. This physical arrangement of devices allows high speed operation of the module. In one example, the hub is located in the center of the module and eight devices, four pairs, are positioned around the hub.
申请公布号 US8438329(B2) 申请公布日期 2013.05.07
申请号 US20110986947 申请日期 2011.01.07
申请人 JANZEN JEFFERY W.;MICRON TECHNOLOGY, INC. 发明人 JANZEN JEFFERY W.
分类号 G06F12/00;G06F13/00;G06F13/16;G11C5/00 主分类号 G06F12/00
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