发明名称 Top electrode templating for DRAM capacitor
摘要 A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited dielectric layer. The high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. A metal oxide second electrode layer is formed above the dielectric layer. The metal oxide second electrode layer has a crystal structure that is compatible with the crystal structure of the dielectric layer. Optionally, a second electrode bulk layer is formed above the metal oxide second electrode layer.
申请公布号 US8435854(B1) 申请公布日期 2013.05.07
申请号 US201113294309 申请日期 2011.11.11
申请人 MALHOTRA SANDRA;CHEN HANHONG;DEWEERD WIM;ODE HIROYUKI;INTERMOLECULAR, INC.;ELPIDA MEMORY, INC. 发明人 MALHOTRA SANDRA;CHEN HANHONG;DEWEERD WIM;ODE HIROYUKI
分类号 H01L21/8242 主分类号 H01L21/8242
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