发明名称 METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH CONTROLLED P-CHANNEL THRESHOLD VOLTAGE
摘要 Methods are provided for fabricating integrated circuits having controlled threshold voltages. In accordance with one embodiment a method includes forming a gate dielectric overlying an N-doped silicon substrate and depositing a layer of titanium nitride and a layer of tantalum nitride overlying the gate dielectric. A sub-monolayer of tantalum oxide is deposited overlying the layer of tantalum nitride by a process of atomic layer deposition, and oxygen is diffused from the tantalum oxide through the tantalum nitride and titanium nitride.
申请公布号 US2013109166(A1) 申请公布日期 2013.05.02
申请号 US201113286292 申请日期 2011.11.01
申请人 TRIYOSO DINA;ERBEN ELKE;HEMPEL KLAUS;GLOBALFOUNDRIES INC. 发明人 TRIYOSO DINA;ERBEN ELKE;HEMPEL KLAUS
分类号 H01L21/28 主分类号 H01L21/28
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