发明名称 Limit Switch Interface Circuit
摘要 A circuit for interfacing to a limit switch configured to be closed when a wire connected to the limit switch is relatively hot and configured to be opened when the wire is relatively cold includes an input, an output, and a control portion. The input is configured to receive a pulse width modulated (PWM) signal having a duty cycle with a high pulse and a low pulse. The output is configured to apply the PWM signal to an external transistor associated with the wire, and a control portion. The high pulse actuates heating of the wire when the high pulse is applied to the external transistor. The control portion is configured to cause voltage across the limit switch to be substantially zero, whereby arcing of the limit switch is relatively minimal, when the limit switch closes while the high pulse is being applied to the external transistor.
申请公布号 US2013107398(A1) 申请公布日期 2013.05.02
申请号 US201213645572 申请日期 2012.10.05
申请人 LEAR CORPORATION;LEAR CORPORATION 发明人 WEBER CHARLES F.
分类号 H03K17/08 主分类号 H03K17/08
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