发明名称 A/D CONVERTER
摘要 <P>PROBLEM TO BE SOLVED: To reduce an error of A/D conversion due to charge injection or clock feed-through in an A/D converter for A/D converting differential signals. <P>SOLUTION: In each A/D conversion cycle, a positive phase analogue input part 50P and a reverse phase analogue input part 50N samples a positive analogue input signal INP and a reverse phase analogue input signal INN, and supplies the positive phase analogue input signal INP to a positive input node C1PB or a reverse phase input node C1NB, and the reverse phase analogue input signal INN to a reverse phase input node C1NB or a positive phase input node C1PB. A control part 400 switches a supply destination of each of the sampled signals per A/D conversion cycle unit. The A/D converter A/D converts a voltage between the positive phase input node C1PB and the reverse phase input node C1NB. An averaging part 502 averages and outputs A/D conversion results every time when the A/D conversion results are obtained predetermined times. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013081094(A) 申请公布日期 2013.05.02
申请号 JP20110220298 申请日期 2011.10.04
申请人 YAMAHA CORP 发明人 OKAMI TAKESHI;TSUJI NOBUAKI;ONO HIDEKAZU
分类号 H03M1/08;H03M1/12 主分类号 H03M1/08
代理机构 代理人
主权项
地址