发明名称 MULTI-THREAD PROCESSOR
摘要 <P>PROBLEM TO BE SOLVED: To provide a multi-thread processor in which overheads of switching schedules are cut. <P>SOLUTION: A multi-thread processor includes a plurality of hardware threads each of which generates an independent instruction flow, a thread scheduler 19 that outputs a thread selection signal to designate a hardware thread to be executed in a next execution cycle among the plurality of hardware threads according to a first or second schedule, a first selector that selects one of the plurality of hardware threads according to the thread selection signal and outputs an instruction generated by the selected hardware thread, and an operational circuit that executes an instruction output from the first selector. The thread scheduler 19 selects the first schedule when the multi-thread processor is in a first state, and selects the second schedule when the multi-thread processor is in a second state. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013080511(A) 申请公布日期 2013.05.02
申请号 JP20120284445 申请日期 2012.12.27
申请人 RENESAS ELECTRONICS CORP 发明人 ADACHI KOJI;MATSUNAGA TOSHIYUKI
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
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