HIGH-FREQUENCY SIGNAL PROCESSOR AND WIRELESS COMMUNICATION SYSTEM

摘要

There is a need to reduce secondary intermodulation distortion that may occur in a reception circuit of a high-frequency signal processor and a wireless communication system having the same. In test mode, for example, a test signal generating circuit TSGEN generates a test signal RFtst at f_tx±0.5 MHz. The test signal RFtst is input to a mixer circuit MIXrx_I (MIXrx_Q). A correction circuit block CALBK detects an IM2 component resulting from the MIXrx_I (MIXrx_Q). The CALBK varies a differential balance for the MIXrx_I (MIXrx_Q) and concurrently monitors a phase for the IM2 component resulting from MIXrx_I (MIXrx_Q). The CALBK searches for the differential balance corresponding to a transition point that allows the phase to transition by approximately 180°. The MIXrx_I (MIXrx_Q) operates in normal mode using the differential balance as a search result.