发明名称 Vertical Gate LDMOS Device
摘要 Described here are transistors and fabrication methods thereof. In one implementation, a transistor includes an n-well region implanted into a surface of a substrate, and a trench in the n-well region. The trench extends from the surface to a first depth. The trench includes a gate of conductive material in the trench, and dielectric material filling a volume of the trench not filled by the conductive material. The transistor also includes a p-type material in a first region extending from a second depth to a third depth, the second depth and the third depth being greater than the first depth. The transistor further includes a source region and a drain region.
申请公布号 US2013105887(A1) 申请公布日期 2013.05.02
申请号 US201213572015 申请日期 2012.08.10
申请人 ZUNIGA MARCO A.;LU YANG;FATEMIZADEH BADREDIN;PRASAD JAYASIMHA;PAUL AMIT;RUAN JUN;VOLTERRA SEMICONDUCTOR CORPORATION 发明人 ZUNIGA MARCO A.;LU YANG;FATEMIZADEH BADREDIN;PRASAD JAYASIMHA;PAUL AMIT;RUAN JUN
分类号 H01L29/78;H01L29/66 主分类号 H01L29/78
代理机构 代理人
主权项
地址