| 摘要 |
<p>A power semiconductor device with a wafer (10) comprising the following layers between an emitter electrode (2) on an emitter side (11) and a collector electrode (25) on a collector side (15) is provided: - an (n-) doped drift layer (3), - an n doped first region (81), which is arranged between the drift layer (3) and the collector electrode (25), - a p doped base layer (4), which is arranged between the drift layer (3) and the emitter electrode (2), which base layer (4) is in direct electrical contact to the emitter electrode (2), - an n doped source region (6), which is arranged at the emitter side (11) embedded into the base layer (4) and contacts the emitter electrode (2), - a gate electrode (7), which is electrically insulated from the base layer (4), the source region (6) and the drift layer (3). The emitter electrode (2) contacts the base layer (4) and the source region (6) within a contact area (22). An active semiconductor cell (18) is formed within the wafer (10), which includes layers or parts of such layers, which lie in orthogonal projection with respect to the emitter side (11) of the contact area (22) of the emitter electrode, to which the source region is in contact, said source region (6), and such a part of the base layer (4), at which an electrically conductive channel can be formed. The device further comprises a p doped well (5), which is arranged in the same plane as the base layer (4), but outside the active cell (18). The well (5) is electrically connected to the emitter electrode (2) at least one of directly or via the base layer (4).</p> |
