发明名称 Self-tracking adaptive bandwidth phase-locked loop
摘要 A phase-locked loop (PLL) generates an oscillator signal based on an input reference signal. A voltage-to-current converter converts a control voltage to a first current and a current-controlled oscillator generates the oscillator signal based on the first current. A dual charge pump circuit generates first and second charge pump currents having a predetermined ratio based on fractions of the calibration current and the first current and an error (feedback) signal. An active loop filter generates the control voltage based on the first and second charge pump currents and includes a transconductance stage having a transconductance that varies with the variation in a third current. The variation in the transconductance causes the second charge pump current to vary, which in turn adjusts the predetermined ratio between the first and second charge pump currents.
申请公布号 US8432200(B1) 申请公布日期 2013.04.30
申请号 US201213343719 申请日期 2012.01.05
申请人 THAKUR KRISHNA;FREESCALE SEMICONDUCTOR, INC. 发明人 THAKUR KRISHNA
分类号 H03L7/06 主分类号 H03L7/06
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