发明名称 |
Chip package and fabrication method thereof |
摘要 |
A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole.
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申请公布号 |
US8432032(B2) |
申请公布日期 |
2013.04.30 |
申请号 |
US20100687093 |
申请日期 |
2010.01.13 |
申请人 |
LIN CHIA-SHENG;TSAI CHIA-LUN;HSU CHANG-SHENG;LEE PO-HAN |
发明人 |
LIN CHIA-SHENG;TSAI CHIA-LUN;HSU CHANG-SHENG;LEE PO-HAN |
分类号 |
H01L23/48 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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