| 摘要 |
A semiconductor device includes a peripheral voltage withstanding structure, which includes an n- SiC layer, an n SiC layer and a p SiC layer are provided successively on an n+ SiC layer. A trench is formed in the peripheral voltage withstanding structure portion so that the trench passes through the p SiC layer 15 and the n SiC layer 14 and reaches the n- SiC layer. This trench is wider than a trench having a trench gate structure in the active region portion. A p+ SiC region is provided along a bottom of the trench so as to be located under the trench. A sidewall and the bottom of the trench are covered with an oxide film and an insulating film having a total thickness not smaller than 1.1 mum. The oxide film and insulating film absorb a large part of a voltage applied between a source and a drain. |
