发明名称 Integrated circuits with edge-adjacent devices having reactance values
摘要 An integrated circuit has a plurality of terminals for making electrical connection to the integrated circuit. At least one device is formed adjacent an outer edge of the integrated circuit. The device includes at least one metal conductor for forming an edge seal for protecting the integrated circuit during die singulation. The device is coupled to one or more functional circuits within the integrated circuit by routing the at least one metal conductor to the one or more functional circuits, the at least one device providing a reactance value to the one or more functional circuits for non-test operational use. The device may be formed as one or more capacitors or as one or more inductors. Various structures may be used for the capacitor and the inductor.
申请公布号 US8431970(B2) 申请公布日期 2013.04.30
申请号 US20100884807 申请日期 2010.09.17
申请人 DEMIRCAN ERTUGRUL;HIGMAN JACK M.;FREESCALE SEMICONDUCTOR, INC. 发明人 DEMIRCAN ERTUGRUL;HIGMAN JACK M.
分类号 H01L29/00 主分类号 H01L29/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利