发明名称 SYSTEMS AND METHODS FOR ZERO-DELAY WAKEUP FOR POWER GATED ASYNCHRONOUS PIPELINES
摘要 A device including a pipeline having a number of groups of pipeline stages. Each group has at least one pipeline stage, a gated power supply power net or a gated ground power net, the gated power supply power net and the gated ground power net having components that allow gating power supply and ground to that group of pipeline stages. The device also has a number of control components, each control component controlling the gating of power supply or ground. Each group of pipeline stages controls the gating of power supply and ground of a subsequent group of pipeline stages. Each one group of pipeline stages being selected such that a forward propagation delay from a preceding group of pipeline stages to that one group is at least equal to a time required for activating gated power supply or ground in that one group. Methods of implementation are also discussed.
申请公布号 US2013099570(A1) 申请公布日期 2013.04.25
申请号 US201113695358 申请日期 2011.04.29
申请人 MANOHAR RAJIT;OTERO CARLOS;TSE JONATHAN 发明人 MANOHAR RAJIT;OTERO CARLOS;TSE JONATHAN
分类号 H02J4/00 主分类号 H02J4/00
代理机构 代理人
主权项
地址