发明名称 |
Flat Laminate, Symmetrical Test Structures and Method of Use To Gauge White Bump Sensitivity |
摘要 |
A symmetrical, flat laminate structure used to minimize variables in a test structure to experimentally gauge white bump sensitivity to CTE mismatch is disclosed. The test structure includes a flat laminate structure. The method of using the test structure includes isolating a cause of a multivariable chip join problem that is adversely impacted by warpage and quantifying a contribution of the warpage, itself, in a formation of the multivariable chip join problem. |
申请公布号 |
US2013098176(A1) |
申请公布日期 |
2013.04.25 |
申请号 |
US201113277246 |
申请日期 |
2011.10.20 |
申请人 |
BERNIER WILLIAM E.;DAUBENSPECK TIMOTHY H.;JADHAV VIRENDRA R.;OBERSON VALERIE A.;QUESTAD DAVID L.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BERNIER WILLIAM E.;DAUBENSPECK TIMOTHY H.;JADHAV VIRENDRA R.;OBERSON VALERIE A.;QUESTAD DAVID L. |
分类号 |
G01N33/00 |
主分类号 |
G01N33/00 |
代理机构 |
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代理人 |
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地址 |
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