发明名称 CLOCK SIGNAL GENERATING APPARATUS CAPABLE OF REDUCING OR AVOIDING CROSSTALK AND GLITCH SIGNALS, AND METHOD USED IN CLOCK SIGNAL GENERATING APPARATUS
摘要 A clock signal generating apparatus includes a first frequency generating circuit, a second frequency generating circuit, and an output circuit. The first frequency generating circuit is arranged to generate a first clock signal having a first oscillation frequency. The second frequency generating circuit is arranged to generate a second clock signal having a second oscillation frequency. The output circuit is arranged to receive the first and second clock signals. The output circuit is able to output one of the first and second clock signals as an output clock signal according to an oscillation frequency control setting provided by an external bounding pad included within the clock signal generating apparatus.
申请公布号 US2013099843(A1) 申请公布日期 2013.04.25
申请号 US201213531609 申请日期 2012.06.25
申请人 CHEN XIAO-FEI 发明人 CHEN XIAO-FEI
分类号 H03K3/01 主分类号 H03K3/01
代理机构 代理人
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