INTEGRATED NON-VOLATILE MEMORY ELEMENTS, DESIGN AND USE

摘要

The invention describes the production and the design of an integrated memory component, comprising at least one surface contact (C) and a mating contact (O) from which at least one rectifying contact is embodied, and a ferroelectric or piezoelectric layer (11) as a conductive channel between the contacts. The design of the memory component with an additional drain connection and an additional source connection for non-volatile control of the conductivity between the source and the drain connection via the rectifying bottom contact or top contact is also described. The principle and the design are then extended to non-volatile analog memories, wherein the conductivity of the piezo- or ferroelectric layer between the contacts and/or beneath the surface contact and/or beneath the associated mating contact is modified, so that a voltage which is applied from the outside to opposite contacts is not dropped uniformly in the piezo- or ferroelectric layer and the electric field is locally large/small and a large electric field can induce a phase conversion of the piezo- or ferroelectric layer. The integration and use of the non-volatile analog memory in an array structure for neuromorphic applications and as a calibration element with an underlying CMOS analog circuit is also described. The principle of the design of the memory component according to the invention can also be extended as an electrode which can be integrated and has a boundary layer which can be positioned in a non-volatile manner and is statically charged. The use of the electrode, which can be integrated, in photo components, particle detectors, in capacitive energy storage means and in logic components is also described.