发明名称 |
DIE STACK PACKAGE AND METHOD FOR FABRICATING THE SAME |
摘要 |
PURPOSE: A die stack package and a manufacturing method thereof are provided to improve yield by preventing a package defect like a short circuit between wires. CONSTITUTION: First outer circuit patterns are formed on an insulation layer(10). A first solder mask(32) opens a part of a control chip land unit. A third solder mask layer covers the first solder mask. A control chip(50) is mounted on the control chip land unit. A bonding finger unit(25) is connected to the control chip by a bonding wire.
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申请公布号 |
KR20130041024(A) |
申请公布日期 |
2013.04.24 |
申请号 |
KR20130032141 |
申请日期 |
2013.03.26 |
申请人 |
SIMM TECH CO., LTD. |
发明人 |
CHUN, MYUNG GIL;SHIN, SEUNG HO;JUNG, CHANG BO |
分类号 |
H05K3/46;H05K3/34 |
主分类号 |
H05K3/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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