SIGNAL SEPARATION CIRCUIT, SIGNAL SEPARATION METHOD, AND COUNTER CIRCUIT USED IN THE SIGNAL SEPARATION CIRCUIT

摘要

In the condition that a data signal of a first channel which is an RZ signal has a pulse period T 1 and a logic "1" pulse width m, a data signal of a second channel which is an RZ signal has a pulse period T 2 and a logic "1" pulse width n and the relation n < m is satisfied, a multiplexed signal D obtained by time-division multiplexing the data signals of the two channels is input. A pulse signal with a pulse width k satisfying the relation n < k < min(m, T 2 ) is generated at timing of a leading edge of the data signal of each channel. When the multiplexed signal D is logic "1" as a result of judgment as to whether the multiplexed signal D is logic "1" or logic "0" at timing of a trailing edge of the pulse signal, the data signal of the first channel is output. When the multiplexed signal D1 is logic "0" as a result of judgment as to whether the multiplexed signal D1 is logic "1" or logic "0" at timing of a trailing edge of the pulse signal, the data signal of the second channel is output.