发明名称
摘要 An apparatus comprising a memory and a coder/decoder circuit. The memory may have a first memory portion and a second memory portion. The coder/decoder circuit may be configured to (i) position a set of atoms across the memory, (ii) define a strip across a portion of the atoms, (iii) designate a first atom within the strip, (iv) locate one or more second atoms to be paired with the first atom, (v) determine whether the one or more second atoms when paired with the first atom forms a legitimate pair, and (vi) read the legitimate pair from the first memory portion and the second memory portion.
申请公布号 JP5190460(B2) 申请公布日期 2013.04.24
申请号 JP20090534581 申请日期 2007.09.28
申请人 发明人
分类号 G06F12/00;G06F12/02;G06F12/06;H04N5/91 主分类号 G06F12/00
代理机构 代理人
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