发明名称 Fixed length memory block management apparatus and method for enhancing memory usability and processing efficiency
摘要 A fixed length memory block management apparatus has a plurality of processors which execute applications, a memory which is shared by the plurality of processors, an application program, an initialization program, and an access right allocation program being stored in the memory. The apparatus has an application execution unit which starts up the application program to execute the application, an initialization unit which starts up the initialization program to set a memory block management area including a plurality of sub-blocks at the memory, and an access right allocation unit which starts up the access right allocation program to allocate an access right of a memory block of the sub-block set by the initialization unit to the application execution unit.
申请公布号 US8429354(B2) 申请公布日期 2013.04.23
申请号 US20090358370 申请日期 2009.01.23
申请人 KODAKA TAKESHI;KABUSHIKI KAISHA TOSHIBA 发明人 KODAKA TAKESHI
分类号 G06F12/00;G06F13/00;G06F13/28 主分类号 G06F12/00
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