发明名称 System-level method for reducing power supply noise in an electronic system
摘要 In one embodiment, a method for reducing power supply noise within an electronic system that includes an integrated circuit (IC), a package, and a printed circuit board (PCB) connected by a plurality of power delivery networks (PDN) is disclosed. Power supply noise within the system is reduced by defining a voltage compression limit for each PDN of the electronic system; determining a voltage compression for each PDN of the electronic system during a plurality of switching events; comparing the voltage compression of each PDN of the electronic system to the voltage compression limit for each switching event; and in response to the voltage compression of each PDN of the electronic system exceeding the limit, modifying the electronic system to reduce the voltage compression below the limit.
申请公布号 US8429590(B2) 申请公布日期 2013.04.23
申请号 US201113184909 申请日期 2011.07.18
申请人 BUDELL TIMOTHY W.;TREMBLE ERIC W.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BUDELL TIMOTHY W.;TREMBLE ERIC W.
分类号 G06F17/50;G06F9/455;G06F11/22;G06G7/54;G06G7/62 主分类号 G06F17/50
代理机构 代理人
主权项
地址