发明名称 Clock generator and a method of generating a clock signal
摘要 The present invention is directed to a clock generator and a method of generating a clock signal. A digital control oscillator (DCO) generates a clock signal. A first frequency calibration unit extracts a periodic signal and determines a frequency error quantity between the extracted periodic signal and a derived clock signal. A second frequency calibration unit generates a coarse tuning signal when an absolute value of the frequency error quantity is greater than a first predetermined threshold, and generates a fine tuning signal when the absolute value of the frequency error quantity is less than a second predetermined threshold.
申请公布号 US8427219(B1) 申请公布日期 2013.04.23
申请号 US201113311354 申请日期 2011.12.05
申请人 WU CHING-CHENG;CHUANG CHIH-YU;SKYMEDI CORPORATION 发明人 WU CHING-CHENG;CHUANG CHIH-YU
分类号 G06F1/04 主分类号 G06F1/04
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