发明名称 Voltage signals multiplexer
摘要 A voltage signal multiplexer includes a control and bias stage to generate at least one control and bias signal as a function of first and second selection signals and first and second input voltage signals. The multiplexer further comprises a switching stage configured to receive the at least one first control and bias signal and to generate therefrom, on an output terminal, an output signal having the first input voltage signal in response to the first and the second selection signals indicating the selection of the first input voltage signal, and having the second input voltage signal in response to the first and the second selection signals indicating the selection of the second input voltage signal. The switching stage is also configured to place the output terminal in a high-impedance condition in response to the first and the second selection signals indicating the high-impedance condition.
申请公布号 US8427882(B2) 申请公布日期 2013.04.23
申请号 US201113184398 申请日期 2011.07.15
申请人 CHIAVETTA CARMELO;STMICROELECTRONICS S.R.L. 发明人 CHIAVETTA CARMELO
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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