发明名称 Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces
摘要 Stacking faults are reduced or eliminated by epitaxially growing a III-V compound semiconductor region in a trench followed by capping and annealing the region. The capping layer limits the escape of atoms from the region and enables the reduction or elimination of stacking faults along with the annealing.
申请公布号 US8426890(B2) 申请公布日期 2013.04.23
申请号 US201213461595 申请日期 2012.05.01
申请人 WU CHENG-HSIEN;KO CHIH-HSIN;WANN CLEMENT HSINGJEN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 WU CHENG-HSIEN;KO CHIH-HSIN;WANN CLEMENT HSINGJEN
分类号 H01L31/102 主分类号 H01L31/102
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