摘要 |
PURPOSE: A resistive memory device, a layout structure thereof, and a sensing circuit are provided to simplify the memory device by removing a write and read circuit for a reference cell. CONSTITUTION: A plurality of memory regions(310,320) include main memory cell arrays(311,321) and reference cell arrays(313,323). The main memory cell array is connected to a plurality of word lines. The reference cell array is connected to a plurality of reference word lines. Adjacent memory regions share a bit line driver and a sinker. The main memory cell array and the reference cell array share a bit line and the word line. [Reference numerals] (315) First column selection unit A; (317) Second column selection unit A; (319) SL driver/sinker A; (325) First column selection unit B; (327) Second column selection unit B; (329) SL driver/sinker B; (331) Low address decoder A; (333) Lower address decoder B; (340) Column address decoder; (350) BL driver/sinker;
|