发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>Proposed is a non-volatile semiconductor memory device in which it is possible to more freely set the voltage used when accumulating charge in a selected memory cell transistor than a conventional one. In the non-volatile semiconductor memory device (1), when accumulating charge in a selected memory cell transistor (115), a high write inhibit voltage is applied through a P-type MOS transistor (9b) and a low write voltage is applied through an N-type MOS transistor (15a). A function for applying a voltage to the selected memory cell transistor (115) or a non-selected memory cell transistor (116) is thereby shared by the separate P-type MOS transistor (9b) and N-type MOS transistor (15a). This makes it possible to separately adjust, for example, the gate and source voltages of each of the P-type and N-type MOS transistors (9b, 15a) and finally to set the gate-substrate voltage to, for example, 4 V or other value.</p>
申请公布号 KR20130039762(A) 申请公布日期 2013.04.22
申请号 KR20137002526 申请日期 2012.09.18
申请人 FLOADIA CORPORATION 发明人 SHINAGAWA HIROSHI;KASAI HIDEO;TANIGUCHI YASUHIRO
分类号 G11C16/06 主分类号 G11C16/06
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