发明名称 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor package which can be reduced in warpage, and a method for manufacturing the same. <P>SOLUTION: The semiconductor package comprises: a first sealing insulating layer for sealing a circuit formation surface and a side surface of a first semiconductor chip; wiring layers and insulating layers which are laminated on a first surface, i.e., a surface on the circuit formation surface side of the first sealing insulating layer; a second semiconductor chip mounted on the insulating layers; and a second sealing insulating layer which is formed on the insulating layers so as to seal the second semiconductor chip. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013069807(A) 申请公布日期 2013.04.18
申请号 JP20110206549 申请日期 2011.09.21
申请人 SHINKO ELECTRIC IND CO LTD 发明人 UCHIYAMA KENTA
分类号 H05K3/46;H01L23/12;H05K3/28 主分类号 H05K3/46
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