| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor storage device which allows manufacturing variations of transistors depending on gate areas to be suppressed and a high speed in read-out operation to be achieved. <P>SOLUTION: A semiconductor storage device comprises: a memory cell array having word lines WL extending in a row direction, a bit line group composed of a plurality of bit lines BL0, BL1 and BL2 extending in a column direction and memory cells that are composed of transistors and are provided on intersections among the word lines WL and the bit line group; and a read-out circuit for reading data from the memory cells via the plurality of bit lines BL0, BL1 and BL2. The memory cells have different connection states in which sources or drains of the transistors are not connected to any of the plurality of bit lines BL0, BL1 and BL2 belonging to the bit line group or are connected to only one of the bit lines BL0, BL1 and BL2. Active regions AA that are gates of the transistor are continuously formed in arrangement regions of the plurality of bit lines BL0, BL1 and BL2 of the bit line group and in spaces among the individual bit lines BL0, BL1 and BL2. <P>COPYRIGHT: (C)2013,JPO&INPIT |
