发明名称 WIRING BOARD
摘要 <P>PROBLEM TO BE SOLVED: To provide a wiring board which prevents adjacent solder bumps from contacting with each other and causing short circuits and enables a semiconductor element to be normally operated. <P>SOLUTION: In a wiring board 10, a second insulation layer 3b is laminated on a surface of a first insulation layer 3a, to which inner layer wiring conductors 4a are deposited, sandwiching the inner layer wiring conductor 4a therebetween, and multiple semiconductor element connection pads 9, in which electrodes T of the semiconductor element S are connected through solder bumps 12, are disposed on a surface of the second insulation layer 3b. The semiconductor element connection pads 9 include: first pads 9a, each of which connects with the inner layer wiring conductor 4a through a via conductor 5a connecting with the semiconductor element connection pad 9 at a position immediately below the semiconductor element connection pad 9; and second pads 9b, each of which connects with the inner layer wiring conductor 4a at a position separated from the semiconductor element connection pad 9 or electrically independent from the inner layer wiring conductor 4a. A dummy via conductor 5b, which is not directly connected with the inner layer wiring conductor 4a, is connected with the second pad 9b at a position immediately below the second pad 9b. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013070003(A) 申请公布日期 2013.04.18
申请号 JP20110209312 申请日期 2011.09.26
申请人 KYOCER SLC TECHNOLOGIES CORP 发明人 AKASHI OSAMU
分类号 H01L23/12;H05K1/02;H05K3/46 主分类号 H01L23/12
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