发明名称 PERFORMANCE AND REDUCING VARIATION OF NARROW CHANNEL DEVICES
摘要 Embodiment of the present invention provides a method of forming transistors such as narrow channel transistors. The method includes creating a transistor region in a substrate; the transistor region being separated from rest of the substrate, by one or more shallow trench isolation (STI) regions formed in the substrate, to include a channel region, a source region, and a drain region; the STI regions having a height higher than the transistor region of the substrate; and the channel region having a gate stack on top thereof; forming spacers at sidewalls of the STI regions above the transistor region; creating recesses in the source region and the drain region with the spacers preserving at least a portion of material of the substrate underneath the spacers along sidewalls of the STI regions; and epitaxially growing source and drain of the transistor in the recesses.
申请公布号 US2013095619(A1) 申请公布日期 2013.04.18
申请号 US201113272340 申请日期 2011.10.13
申请人 WEHELLA-GAMAGE DEEPAL;ONTALUS VIOREL;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 WEHELLA-GAMAGE DEEPAL;ONTALUS VIOREL
分类号 H01L21/84;H01L21/336 主分类号 H01L21/84
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