发明名称 |
MOSFET AND MANUFACTURING METHOD THEREOF |
摘要 |
<p>Provided are an MOSFET and a manufacturing method thereof. The MOSFET is formed in an SOI chip. The MOSFET comprises: a shallow trench isolation region (17), a source region being defined in a semiconductor layer (13); a gate stack layer (GS0), located on the semiconductor layer; the source region and a drain region, located in the semiconductor layer and at two sides of the gate stack layer; a channel region, located in the semiconductor layer and sandwiched between the source region and the drain region; a back gate (18), located in a semiconductor substrate (11); a first dummy gate stack layer (GS1), overlapping with the boundary between the semiconductor layer and the shallow trench isolation region; and a second dummy gate stack layer (GS2), located on the shallow trench isolation region. The MOSFET further comprises a conductive channel (24) located between the gate stack layer and the first dummy gate stack layer and electrically connected to the source region and the drain region respectively, and a conductive channel (24) located between the first dummy gate stack layer and the second dummy gate stack layer and electrically connected to the back gate. The MOSFET can use the dummy gate stack layer to prevent a short circuit between the back gate and the source/drain region.</p> |
申请公布号 |
WO2013053166(A1) |
申请公布日期 |
2013.04.18 |
申请号 |
WO2011CN82415 |
申请日期 |
2011.11.18 |
申请人 |
INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES;ZHU, HUILONG;LIANG, QINGQING;YIN, HAIZHOU;LUO, ZHIJIONG |
发明人 |
ZHU, HUILONG;LIANG, QINGQING;YIN, HAIZHOU;LUO, ZHIJIONG |
分类号 |
H01L29/78;H01L21/336 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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