| 摘要 |
<P>PROBLEM TO BE SOLVED: To achieve both higher speed operability and higher S/N ratio while reducing capacitance of drive wiring and signal wiring in a detector which deals with multiple image capturing modes. <P>SOLUTION: A detector comprises: a transformation device 120; a transistor 130 which includes a semiconductor layer 131 including a first channel region and a second channel region, a first gate electrode 134, and a second gate electrode 135; first drive wiring 141 connecting with the first gate electrode 134; second drive wiring 141 connecting with the second gate electrode 135; a first conductive voltage supply part 171 supplying a first conductive voltage to the first drive wiring 141; a second conductive voltage supply part 172 for supplying a second conductive voltage to the second drive wiring 142; and a selection part 174 selecting one of first connection between the second drive wiring 142 and the first conductive voltage supply part 171 and second connection between the second drive wiring 142 and the second conductive voltage supply part 172. <P>COPYRIGHT: (C)2013,JPO&INPIT |
