| 摘要 |
<p>A method and apparatus for determining validity of a clock synchronization source device. The method comprises: a slave clock device receiving an announce packet and a sync packet sent by a clock source device, and sending a delay_req packet to the clock source device; upon receiving the delay_req packet, the clock source device replying with a delay_resp packet; and if the slave clock device detects that none of the announce packet, the sync packet, and the delay_resp packet times out, determining that an uplink and a downlink of the clock source device are bidirectionally valid. The validity of a source device is determined by detecting a packet reception situation, so as to reduce application risks of the 1588 protocol in an actual network environment, and ensure that a network link between a master device and a slave device is normal.</p> |
