发明名称 |
STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE HAVING A CAPACITOR WELL DOPING DESIGN WITH IMPROVED COUPLING EFFICIENCY |
摘要 |
The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode.
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申请公布号 |
US2013092991(A1) |
申请公布日期 |
2013.04.18 |
申请号 |
US201113273505 |
申请日期 |
2011.10.14 |
申请人 |
LIAO TA-CHUAN;YANG CHIEN-KUO;TSUI YING-KIT;CHEN SHIH-HSIEN;KUO LIANG-TAI;KO CHUN-YAO;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD |
发明人 |
LIAO TA-CHUAN;YANG CHIEN-KUO;TSUI YING-KIT;CHEN SHIH-HSIEN;KUO LIANG-TAI;KO CHUN-YAO |
分类号 |
H01L27/108;H01L21/336 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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地址 |
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