| 摘要 |
PURPOSE: A memory device and an accessing method thereof are provided to reduce power consumption by minimizing the load of a local group line. CONSTITUTION: A local word line decoder(LWDEC) includes a first inverter(IVT1) and a second inverter(IVT2). The first inverter includes a PMOS transistor and an NMOS transistor. The PMOS transistor and NMOS transistor are connected between a power voltage and an inverted voltage of a global word line. The first inverter inverts the logic level of a local group line by decoding a preset number of lower bits of a block address and a row address and inputting the decoded bits to the local group line. A second inverter activates a local word line by inverting the output of the first inverter. |
