发明名称 |
Wafer level semiconductor package and fabrication method thereof |
摘要 |
A wafer level semiconductor package is provided. A warpage control barrier line formed in every package of a single wafer prevents wafer from warping. The changed shape of the interface between a semiconductor chip and a molding layer at the edge of the package disperses stress applied to the outside of the package, and suppress the generation and propagation of crack. The size of the package is reduced to that of the semiconductor, and the thickness of the package is minimized.
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申请公布号 |
US8421211(B2) |
申请公布日期 |
2013.04.16 |
申请号 |
US20100824190 |
申请日期 |
2010.06.27 |
申请人 |
KANG IN SOO;JUNG GI JO;JEON BYOUNG YOOL;NEPES CORPORATION |
发明人 |
KANG IN SOO;JUNG GI JO;JEON BYOUNG YOOL |
分类号 |
H01L23/16;H01L25/065 |
主分类号 |
H01L23/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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