发明名称 GENERIC RADAR ARCHITECTURE
摘要 <p num="1"><br/><br/> The invention relates to the general field of complex electronic and/or<br/>computerized system architectures for which the interchanges take the form<br/>of irregular data flows prompted by processing functions of variable duration<br/>in time.<br/>The object of the invention is an architecture designed for electronic systems<br/>having a plurality of processing nodes in which each node provides a function<br/>or part of a function implemented by the system. This architecture is based<br/>on:<br/>- one single synchronization link which supplies all the modules with a<br/>common synchronization message containing synchronization information<br/>and a simplified header,<br/>- a plurality of asynchronous data interchange links, each link allowing<br/>message interchange between two specific processing nodes, with the<br/>interchanged messages having data to be processed, accompanied by a<br/>generic header.<br/> The asynchronous links'' generic header contains all the information relating<br/>to the system''s operating step to which the interchanged data refer.<br/> The synchronous link''s simplified header makes it possible to determine the<br/>data stream to which the associated synchronization information applies.<br/>Each processing node has means suitable for interfacing with the<br/>synchronous and asynchronous links.<br/>The invention applies particularly to the design of electromagnetic or <br/>acoustic<br/>sensors, such as radars and sonars.<br/>
申请公布号 CA2611704(C) 申请公布日期 2013.04.16
申请号 CA20062611704 申请日期 2006.06.09
申请人 THALES 发明人 ELLEAUME, PHILIPPE
分类号 H04J3/06 主分类号 H04J3/06
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