发明名称 |
Spread spectrum clock signal generator method and system |
摘要 |
A system and method for generating a spread spectrum clock signal with a constant ppm offset as a function of a repetition number. A phase interpolator can be configured in association with of a phase-locked loop circuit in order to provide a phase movement from a bit clock generated by the PLL circuit. A repetition number divider computes the repetition number for each time slot in a piece-wise SSC modulation profile. A noise shaping modulator can be employed for modulating a fractional part associated with the repetition number. A repetition counter and a phase accumulator receives an integer part of the repetition number and counts unit interval clock periods equal to a sum of integer and the sigma-delta modulated fractional parts of the repetition number. The phase accumulator can be incremented and/or decremented based on the sign of the spread spectrum direction. |
申请公布号 |
US8422536(B2) |
申请公布日期 |
2013.04.16 |
申请号 |
US20100774175 |
申请日期 |
2010.05.05 |
申请人 |
ANIDJAR JOSEPH;PARIKH PARAG;SINDALOVSKY VLADIMIR;LSI CORPORATION |
发明人 |
ANIDJAR JOSEPH;PARIKH PARAG;SINDALOVSKY VLADIMIR |
分类号 |
H04B1/69 |
主分类号 |
H04B1/69 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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