发明名称 |
METHOD OF RESOLVING SUBSTRATE WARPAGE PROBLEM DUE TO DIFFERENCES IN THERMAL COEFFICIENTS AND ELECTRONIC COMPONENT EMBEDDED PRINTED CIRCUIT BOARD MANUFACTURED THEREOF |
摘要 |
<p>PURPOSE: A solving method of a substrate warpage problem due to heat expansion contraction rate difference and an electronic component built-in printed circuit board applying the method are provided to prevent a warpage occurrence of the substrate by using a laminate-molded material in which maintaining more than 50% of the content of the ceramic filler. CONSTITUTION: A cavity is manufactured in an internal layer insulating layer(180) of a hardened status. An electronic component(170) is built in the cavity. A first insulation layer and a copper foil(190) of a semi-hardened status are laminated on the electronic component. A via hole is formed after the first insulation layer is solidified. The via hole electronically connects the copper foil of the substrate outside layer and an input-output terminal bump of the electronic component.</p> |
申请公布号 |
KR101253514(B1) |
申请公布日期 |
2013.04.11 |
申请号 |
KR20110110637 |
申请日期 |
2011.10.27 |
申请人 |
APERIO CO., LTD. |
发明人 |
KIM, KI HUN;KO, YOUNG JOO |
分类号 |
H05K3/46;H05K1/02;H05K1/18 |
主分类号 |
H05K3/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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