发明名称 MULTILAYER SUBSTRATE AND MANUFACTURING METHOD OF THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To provide a multilayer substrate which further reduces bump heights, improves the density of a package, and improves the reliability of the package in a flip chip or other packages having high density and multiple contacts, which has a planarized surface. <P>SOLUTION: A multilayer substrate includes: a surface dielectric layer 404 and at least one pad layer 402. The surface dielectric layer 404 is provided at one surface layer of the multilayer substrate, and the pad layer 402 is buried in the surface dielectric layer 404. The surface dielectric layer 404 and the pad layer 402 form the multilayer substrate of this invention. The at least one pad layer 402 is formed on a surface of a flat carrier, and the surface dielectric layer 404 covering the pad layer 402 is formed to allow the pad layer 402 to be buried in the surface dielectric layer 404. The multilayer substrate is separated from the surface of the carrier, and the surface dielectric layer 404 and the pad 402 form the multilayer substrate having a flat surface. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013065876(A) 申请公布日期 2013.04.11
申请号 JP20120255910 申请日期 2012.11.22
申请人 PRINCO CORP 发明人 YANG CHIH-KUANG
分类号 H01L23/12;H05K3/22;H05K3/28;H05K3/34 主分类号 H01L23/12
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