发明名称 LOW CONSUMPTION FLIP-FLOP CIRCUIT WITH DATA RETENTION AND METHOD THEREOF
摘要 The present disclosure relates to a low consumption flip-flop circuit with data retention, comprising at least one flip-flop and at least one retention cell connected to the output of the flip-flop and configured so that during normal operation of the flip-flop circuit, the retention cell transmits the data or logic state present on the output terminal of the flip-flop to its own output terminal, while during low consumption operation of the flip-flop circuit a latch circuit of the retention cell suitable to memorize data or a logic state corresponding to the last data or logic state present on the output terminal of the flip-flop is activated.
申请公布号 US2013088272(A1) 申请公布日期 2013.04.11
申请号 US201213689476 申请日期 2012.11.29
申请人 STMICROELECTRONICS S.R.L.;STMICROELECTRONICS INTERNATIONAL NV;STMICROELECTRONICS INTERNATIONAL NV;STMICROELECTRONICS S.R.L. 发明人 VEGGETTI ANDREA MARIO;JAIN ABHISHEK;ROHILLA PANKAJ
分类号 H03K3/012 主分类号 H03K3/012
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