发明名称 METHOD OF FABRICATING VERTICALLY MOUNTABLE IC PACKAGE
摘要 <P>PROBLEM TO BE SOLVED: To provide a method of fabricating a vertically mountable integrated circuit (IC) package. <P>SOLUTION: An integrated circuit is mounted on a printed circuit board (PCB) 36 and electrically coupled to a bond pad on the PCB 36. The bond pad is coupled with a via that is embedded in the PCB 36. The IC, the bond pad, the via, and a portion of the PCB 36 are singulated in order to create a vertically mountable IC package. The via is cut through cross-sectionally during singulation so as to expose a portion of the via and thereby provide a mountable area for the IC package. The IC package is encapsulated or housed in a dielectric material. In addition, the via is treated with a preservative or other suitable electroless metal plating deposition that prevents oxidation and promotes solderability. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013065869(A) 申请公布日期 2013.04.11
申请号 JP20120247657 申请日期 2012.11.09
申请人 HONEYWELL INTERNATL INC 发明人 MCCARTHY DANIEL J;WITHANAWASAM LAKSHMAN S
分类号 H01L23/12 主分类号 H01L23/12
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